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Debugging JTAG Connectivity Problems - Texas Instruments Wiki. This page is no longer maintained and is kept here for reference only! Please go to this link for the most current version. Introduction. This page talks about how to properly debug JTAG connection issues by providing a step- by- step method of narrowing down the problem based on the feedback Code Composer Studio provides. Check section 3 of the CCSv. Support for certain devices require CCS to be updated to the correct level.
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Ultimately reinstall your copy of CCS in case of file corruption Is the Target Configuration File correct? Check if the target configuration file (. JTAG debug probe (Connection) and target (Device or Board) and use the Test Connection button to determine whether your JTAG connection is working at the lowest level. For details please check item 8 of the next section.
If the issue happens during loading code to the target, check the Troubleshooting CCS - Data Verification Errors page. If the issue happens after the code loaded successfully but never reaches main(), the problem resides on the application code (bad initialization of the device, watchdog timers not being refreshed, invalid memory accesses, etc.) - in this case the application needs to be fixed. Troubleshooting the connect phase. The items below are useful to double check all aspects involved with a good connection.
Also, each item is followed with some common scenarios described in the Common Errors topic below. Check that you are using high quality cables for connections and the connections are not loose. Also, loose cable connections are more difficult to troubleshoot, as they may work fine at certain times. Determine whether the debug probe is correctly setup in the Host by checking either the Windows System Devices control panel or using Linux command line tools (details here). For XDS1. 00, please check section 2. XDS1. 00 page. Check all hardware - details are shown in the section Hardware checklist below. Check if the target configuration file (.
JTAG debug probe (Connection) and target (Device or Board). Check if the target configuration file (. Check their pages at XDS5.
XDS5. 60v. 2 System Trace. If you are using a Stellaris device with a XDS emulator, please check the page Stellaris Emulator Compatibility. If you are using a TMS5. How to properly set the speed when using a Spectrum Digital XDS5. USB emulator. How to properly correct a bug on the Debug Access Port designator (all emulators)6. Check if you have the proper license to work with the JTAG debug probe (details here). Sometimes the JTAG debugger is completely at fault - i.
In this case, it is absolutely unpredictable what types of messages can be shown. If you are unable to connect to a specific core of an So. C device (IVAHD, EVE, IPUSS, PRUSS, etc.), you may need to release it from reset. Check the section Core Status at the GSG: Connecting to slave cores in So. C devices page. 9. If you are unable to connect to a flash- based device, keep in mind that pre- loaded code may prevent it from properly connecting. Check if the connector is properly seated in the target board.
For most of the TI connectors (1. However, keep in mind they still may be connected displaced - i. All the ARM connectors (1. Double- check the USB cable you are using: either if it is broken, loose or is a charger- only cable (no data, only 5. V power). Check your schematic to see whether the JTAG header is correctly connected on the PCB. Details can be found on the JTAG Connectors page. An example, instructions for the Beaglebone White can be found here.
Does your emulator support the target I/O voltage? There are some older products which cannot handle newer targets with 1.
V I/O as they were designed to operate with 3. V and 5. V targets. Contact your emulator manufacturer for details. Review the Emulation FAQ6. If experiencing sudden target disconnects, the cable between the JTAG debugger and the board may be loose or broken. Also, the JTAG clock speed may be too high. Check for Electro- Magnetic Interference (EMI).
If you are working with electronics that are near motors or other electrical components that could induce currents, then shielding and isolation may be important. This typically manifests itself as the connection to CCS becoming unstable or intermittent. How To Renew An Indiana Teaching License more. Check the Windows Control Panel, the XDS1. Troubleshooting or the XDS2.
The Linux udev rules are not properly configured. Either check Linux lsusb and udev rules, run the install. For XDS5. 60v. 2, check the manufacturer's debug probe manual to see if it is in Safe Mode. The JTAG debugger is not powered (some variants of XDS5.
XDS5. 60v. 2). Check the external power supply. The USB cable has loose contacts or not connected at all. Replace the USB cable and retest. The USB is connected via an incompatible USB HUB or port. Connect the USB cable directly to the host PC or to a different port.
The debug probe firmware is incompatible with the OS. This is mostly applicable to XDS1. XDS2. 00. To verify this you can check the steps shown in the Firmware update section for XDS1. XDS2. 00. XDS2. 00, XDS5.
XDS5. 60v. 2. This has two variants that may happen in alternate circumstances. Error initializing emulator.
Error - 2. 08. 3 @ 0x. Unable to communicate with the debug probe.
Confirm debug probe configuration and connections, reset the debug probe, and retry the operation. Confirm emulator configuration and connections, reset the emulator, and retry the operation. The firmware and. View the Read. Me. Technically a cable break is detected by a pin that is grounded when the cable is plugged in.
If the pin is on the connector that plugs into the target board, it is often called Cable Break Far or sometimes just Cable Break. If the pin is on the connector that plugs into the debug probe (e. If the ICEPick driver reports this error immediately upon connect, it's likely a hard fail with the JTAG connection itself (loose cables or connections, etc.). However, if the error happens later in the debug session the reasons are different (perhaps the reliability of the JTAG connection due to noise, etc.). Reset the device, and retry the operation. If. error persists, confirm configuration, power- cycle the board, and/or try.
JTAG settings (e. Correct the target configuration file.
JTAG operations. over SWD are not supported. In this case it is possible that the application made some access that caused memory bus to hang (bus contention).
If so, it tries to clear that condition and returns a warning (a ready- hang condition) and proceeds. If it still can't access the core after that, then it means the bus stayed locked up as subsequent memory accesses continue to fail and it gives up. Similarly as above, a bus may be hung range from either an invalid instruction that can misconfigure the memory interface; a bus locked by another core, a peripheral or DMA (bus contention) or even a power supply dip when a specific piece of hardware is accessed. They will require either issuing a System Reset, a board Hardware reset or power cycle. Power- cycle the board.
This is an unrecoverable error that prevents the JTAG debugger from halting the core. It will require either issuing a System Reset, a board Hardware reset or power cycle. At this point it may be possible to dump memory and try to find the source of the error. At this point the code integrity is ok and it gives the most chances to find the source of the error. Both a disconnect and power cycle will be required, but there is a possibility the running firmware on the device may be preventing the JTAG debugger from properly connecting (if the device has flash memory). In these cases, consult the documentation of your device to find out how to unlock it. Reset the device, and retry the operation.
Both a disconnect and power cycle will be required, but there is a possibility the running firmware on the device may be preventing the JTAG debugger from properly connecting (if the device has flash memory).